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4700 King Abdullah University of Science and Technology
Thuwal 23955-6900
Kingdom of Saudi Arabia

Muhammad M. Hussain

Associate Professor, Electrical Engineering

Ph.D. Electrical and Computer Engineering with Portfolio Certificate in Nanotechnology, University of Texas at Austin, USA, 2005

M.S. Solid State Electronics, University of Texas at Austin, USA, 2004

M.S. Electrical Engineering, University of Southern California, USA, 2002

B.S. Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, Bangladesh, 2000

Research Interests

Hussain's research is focused on state-of-the-art CMOS compatible integrated nano-systems including:

  • Energy independent systems-on-chip for industrial, health, defense and space applications;
  • Nanotechnology-enabled mass scale thermoelectric energy systems;
  • Integrated micro/nano systems for water purification, desalination and energy sustainability;
  • State-of-the-art CMOS compatible large scale integration of nanostructured disruptive and multifunctional devices;
  • Hybrid integration of self-recovering molecular systems. These activities are executed based on large-scale integration of advanced nano-materials using novel nanofabrication techniques to build arbitrary and ordered structures in well oriented functional devices and systems.

Selected Publications

  • M. M. Hussain, C. E. Smith, R. Harris, C. Young, B. Sassman, H. –H. Tseng, , R. Jammy, "Gate first integration of high-k/metal gate CMOS FinFET with multi-VTh engineering", IEEE Transactions on Electron Devices, Vol. 57, No. 3, pp. 626-631, March 2010 [Top 10 highest access IEEE TED paper in March 2010].
  • J. Oommen, M. A. Emwas, P. Agarwal, L. Archer, M. M. Hussain, "Nuclear Mag netic Resonance study of Nano-scale Ionic Materials (NIMs)" (accepted to Electrochemical and Solid State Letters)
  • C. S. Park, M. M. Hussain, K. Tateiwaa, J. Huang, J. Linb, T. Ngai, S. Lian, K. Rader, B. Taylor, P. Kirsch, R. Jammy, "Alternative approaches for high-k/metal gate CMOS: Low Temperature Process (Gate Last) and SiGe Channel", VLSI-TSA 2010, Taiwan [First two authors equally contributed to this paper]
  • H. Dadgour, M. M. Hussain, C. E. Smith, K. Banerjee, "Design and analysis of compact ultra low-power logic gates using laterally-actuated double- electrode NEMS", DAC 2010, Anaheim, CA, USA